In the fabrication of modem semiconductor devices, the ever increasing device density and decreasing device dimensions demand more stringent requirements in the packaging or interconnecting techniques of such high density devices. Conventionally, a flip-chip attachment method has been used in packaging of semiconductor chips. In the flip-chip attachment method, instead of attaching a semiconductor die to a lead frame in a package, an array of solder bumps is formed on the surface of the die. The formation of the solder bumps may be carried out in an evaporation method by using a composite material of tin and lead through a mask for producing a desired pattern of solder bumps. The technique of electrodeposition has been more recently developed to produce solder bumps in flip-chip packaging process.
Other techniques that are capable of solder-bumping a variety of substrates to form solder balls have also been proposed. The techniques generally work well in bumping semiconductor substrates that contain solder structures over a minimal size. For instance, one of such widely used techniques is a solder paste screening method which has been used to cover the entire area of an eight inch wafer. However, with recent trend in the miniaturization of device dimensions and the necessary reduction in bump-to-bump spacing (or pitch), the use of the solder paste screening technique has become impractical for several reasons. One of the problems in utilizing solder paste screening technique in bonding modern semiconductor devices is the paste composition itself. A solder paste is formed by a flux material and solder alloy particles. The consistency and uniformity of the solder paste composition become more difficult to control as the solder bump volume decreases. Even though a solution of the problem has been proposed by using solder paste that contain extremely small and uniform solder particles, it can only be achieved at a high cost penalty. A second problem in utilizing the solder paste screening technique in modern high density semiconductor devices is the available space between solder bumps. It is known that a large volume reduction occurs when a solder changes from a paste state to a cured stated, the screen holes for the solder paste must be significantly larger in diameter than the actual solder bumps to be formed. The large volume shrinkage ratio thus makes the solder paste screening technique difficult to carry out in high density devices.
Other techniques for forming solder bumps such as the controlled collapse chip connection (C4) technique and the thin film electrodeposition technique have also been used in recent years in the semiconductor fabrication industry. The C4 technique is generally limited by the resolution achievable by a molybdenum mask which is necessary for the process. Fine-pitched solder bumps are therefore difficult to be fabricated by the C4 technique. Similarly, the thin film electrodeposition technique which also requires a ball limiting metallurgy layer to be deposited and defined by an etching process which has the same limitations as the C4 technique. For instance, a conventional thin film electrodeposition process for depositing solder bumps is shown in FIGS. 1A.about.1H.
A conventional semiconductor structure 10 is shown in FIG. 1A. The semiconductor structure 10 is built on a silicon substrate 12 with active devices built therein. A bond pad 14 is formed on a top surface 16 of the substrate 12 for making electrical connections to the outside circuits. The bond pad 14 is normally formed of a conductive metal such as aluminum. The bond pad 14 is passivated by a final passivation layer 20 with a window 22 opened by a photolithography process to allow electrical connection to be made to the bond pad 14. The passivation layer 20 may be formed of any one of various insulating materials such as oxide, nitride or organic materials. The passivation layer 20 is applied on top of the semiconductor device 10 to provide both planarization and physical protection of the circuits formed on the device 10.
Onto the top surface 24 of the passivation layer 20 and the exposed top surface 18 of the bond pad 14, is then deposited an under bump metallurgy layer 26. This is shown in FIG. 1B. The under bump metallurgy (UBM) layer 26 normally consists of an adhesion diffusion barrier layer 30 and a wetting layer 28. The adhesion diffusion barrier layer 30 may be formed of Ti, TiN or other metal such as Cr. The wetting layer 28 is normally formed of a Cu layer or a Ni layer. The UMB layer 26 improves bonding between a solder ball to be formed and the top surface 18 of the bond pad 14.
In the next step of the process, as shown in FIG. 1C, a photoresist layer 34 is deposited on top of the UMB layer 26 and then patterned to define a window opening 38 for the solder ball to be subsequently formed. In the following electrodeposition process, a solder ball 40 is electrodeposited into the window opening 38 forming a structure protruded from the top surface 42 of the photoresist layer 34. The use of the photoresist layer 34 must be carefully controlled such that its thickness is in the range between about 30 .mu.m and about 40 .mu.m, preferably at a thickness of about 35 .mu.m. The reason for the tight control on the thickness of the photoresist layer 34 is that, for achieving a fine-pitched solder bump formation, a photoresist layer of a reasonably small thickness must be used such that a high imaging resolution can be achieved. It is known that, during a photolithography process, the thicker the photoresist layer, the poorer is the imaging process. To maintain a reasonable accuracy in the imaging process on the photoresist layer 34, a reasonably thin photoresist layer 34 must be used which results in a mushroom configuration of the solder bump 40 deposited therein. The mushroom configuration of the solder bump 40 contributes greatly to the inability of a conventional process in producing fine-pitched solder bumps.
Referring now to FIG. 1E, wherein the conventional semiconductor structure 10 is shown with the photoresist layer 34 removed in a wet stripping process. The mushroom-shaped solder bump 40 remains while the under bump metallurgy layer 26 is also intact. In the next step of the process, as shown in FIG. 1F, the UBM layer 26 is etched away by using the solder bump 40 as a mask in an wet etching process. The solder bump 40 is then heated in a reflow process to form solder ball 42. The reflow process is conducted at a temperature that is at least the reflow temperature of the solder material.
FIG. 1G shows an enlarged, cross-sectional view of the solder bump 40 of FIG. 1D. The mushroom-shaped solder bump is formed over the photoresist layer 34. The dimension for the base of the solder bump is X=150 .mu.m, for the outer diameter of the mushroom is Y=205 .mu.m, for the height of the base of the solder bump is h=34 .mu.m, and for the total height of the mushroom configuration is H=62 .mu.m. In this specific example, it is seen that the total height of the mushroom is almost twice as the height of the base of the solder bump in the window and furthermore, the outside diameter of the mushroom is significantly larger than the outside diameter of the base portion of the solder bump 40. A comparison in the areas occupied by the base portion 46 and the top portion of the mushroom 48 is shown in FIG. 1H. A simple calculation indicates that the total area occupied by the mushroom 48 is 32,900 .mu.m.sup.2, compared to a total area occupied by the base portion 46 of 17,600 .mu.m.sup.2. The total chip real estate occupied by the mushroom portion is therefore almost twice as large as that occupied by the base portion of the solder bump. In other words, almost twice as much space is needed for forming a solder bump which has the mushroom configuration. The height of the solder ball 42 formed after the reflow process is approximately 100 .mu.m.
It is therefore an object of the present invention to provide a method for forming solder balls that do not have the drawbacks or shortcomings of the conventional methods.
It is another object of the present invention to provide a method for forming solder balls by utilizing an additional leachable metal layer between an under bump metallurgy layer and the solder bump such that a larger spacing between the solder balls can be achieved.
It is a further object of the present invention to provide a method for forming solder balls by depositing a solder material by a technique of electrodeposition, screen printing or physical vapor deposition.
It is another further object of the present invention to provide a method for forming solder balls by utilizing a photoresist layer which has a larger thickness and filling a window in the photoresist layer with electrodeposited solder material without a mushroom configuration.
It is still another object of the present invention to provide a method for forming a fine-pitched solder bumps by utilizing an additional layer of a leachable metal between an under bump metallurgy layer and the solder ball wherein the leachable metal is deposited by sputtering or evaporation.
It is yet another object of the present invention to provide a method for forming fine-pitched solder bumps by electrodepositing a solder material into a window formed in a photoresist layer wherein the solder material consists mainly of tin and lead.
It is still another further object of the present invention to provide a solder bump structure formed on an electronic substrate that has an interface between the solder ball and the under bump metallurgy layer comprises atoms of a leachable metal of silver or gold.
It is yet another further object of the present invention to provide a method for forming fine-pitched solder bumps by utilizing an additional leachable metal layer of silver or gold inbetween an under bump metallurgy layer and a solder bump such that the leachable metal melts into the solder bump after a reflow process.